Hardware Circuits and Systems Design for Post-Quantum Cryptography—A Tutorial Brief
Hardware Circuits and Systems Design for Post-Quantum Cryptography—A Tutorial Brief
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DOI：
10.1109/tcsii.2024.3357836
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发表时间：
2024-03
期刊：
影响因子：
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通讯作者：
Jiafeng Xie;Wenfeng Zhao;Hanho Lee;Debapriya Basu Roy;Xinmiao Zhang
中科院分区：
文献类型：
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作者：
Jiafeng Xie;Wenfeng Zhao;Hanho Lee;Debapriya Basu Roy;Xinmiao Zhang
由于可能的大规模量子计算机受到威胁的增加，Quantum Pryptography（PQC）最近引起了各个社区的重大关注。特别是，与国家标准技术研究所（NIST）PQC标准化过程一起，更多的作品逐渐转移到PQC硬件实现。按照这种趋势，该教程简介由该领域的一群专家领导，旨在为PQC提供有关硬件电路和系统设计的全面教程。在引入了不同PQC的主要算术操作和算法功能之后，我们引入了相关的PQC硬件电路和系统设计技术（从组件到系统级别）。还提供了未来的研究和方向。本教程将为TCAS-II社区以及更广泛的电路和系统社会提供有用的信息。
Due to the increasing threats from possible large-scale quantum computers, post-quantum cryptography (PQC) has drawn significant attention from various communities recently. In particular, along with the National Institute of Standards and Technology (NIST) PQC standardization process, more works have gradually switched to the PQC hardware implementations. Following this trend, this tutorial brief, led by a group of experts in the field, aims to deliver a comprehensive tutorial on hardware circuits and systems design for PQC. After introducing primary arithmetic operations and algorithmic features of different PQC, we introduced related PQC hardware circuits and systems design techniques (from component to system levels). Future research and directions are also provided. This tutorial will provide useful information for the TCAS-II community and the broader Circuits and Systems Society.