SCR device with dynamic holding voltage for on-chip ESD protection in a 0.25-/spl mu/m fully salicided CMOS process
SCR device with dynamic holding voltage for on-chip ESD protection in a 0.25-/spl mu/m fully salicided CMOS process
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DOI：
10.1109/ted.2004.834904
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发表时间：
2004-09
影响因子：
3.1
通讯作者：
M. Ker;Zi-Ping Chen
中科院分区：
文献类型：
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作者：
M. Ker;Zi-Ping Chen
提出了一种动态保持电压可控硅整流（DHVSCR）器件，并在0.25-/spl μ/m/2.5-V硅化物CMOS工艺中进行了验证。在DHVSCR器件结构中，控制nMOS和pMOS晶体管直接嵌入SCR器件结构中。通过改变嵌入式nMOS和pMOS的栅压，DHVSCR器件具有保持电压和保持电流可调的特点。在正常电路操作条件下，DHVSCR具有高于电源电压的保持电压，而不会引起闩锁问题。在静电放电（ESD）应力条件下，DHVSCR具有较低的保持电压以有效地箝位过冲ESD电压。从实验结果来看，器件宽度为50 μ/m的DHVSCR可以维持5.6 kV的人体模型ESD水平。
A dynamic-holding-voltage silicon-controlled rectifier (DHVSCR) device is proposed and verified in a 0.25-/spl mu/m/2.5-V salicided CMOS process. In the DHVSCR device structure, the control nMOS and pMOS transistors are directly embedded in SCR device structure. The proposed DHVSCR device has the characteristics of tunable holding voltage and holding current by changing the gate voltage of embedded nMOS and pMOS. Under normal circuit operating condition, the DHVSCR has a holding voltage higher than the supply voltage without causing a latch-up issue. Under an electrostatic discharge (ESD) stress condition, the DHVSCR has a lower holding voltage to effectively clamp the overshooting ESD voltage. From the experimental results, the DHVSCR with a device width of 50 /spl mu/m can sustain a human-body-model ESD level of 5.6 kV.