Pinatubo: A processing-in-memory architecture for bulk bitwise operations in emerging non-volatile memories
Pinatubo: A processing-in-memory architecture for bulk bitwise operations in emerging non-volatile memories
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DOI：
10.1145/2897937.2898064
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发表时间：
2016-06
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影响因子：
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通讯作者：
Shuangchen Li;Cong Xu;Qiaosha Zou;Jishen Zhao;Yu Lu;Yuan Xie
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文献类型：
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作者：
Shuangchen Li;Cong Xu;Qiaosha Zou;Jishen Zhao;Yu Lu;Yuan Xie
内存处理（PIM）通过在主存中实现计算，提供了高带宽、大规模并行性和高能效，从而消除了CPU和内存之间的数据移动开销。虽然大多数最近的工作集中在PIM在DRAM存储器与3D管芯堆叠技术，我们建议利用新兴的非易失性存储器（NVM）的独特功能，如基于电阻的存储和电流检测，使高效的PIM设计在NVM。我们提出了Pinatubo1，一个处理在非易失性存储器ArchiTecture块位操作。Pinatubo没有将复杂的逻辑集成在成本敏感的存储器中，而是重新设计了读取电路，以便它可以非常有效地计算两个或多个存储器行的按位逻辑，并支持一步多行操作。在数据密集型图处理和数据库应用上的实验结果表明，Pinatubo在位操作上实现了约500倍的加速比，约28000倍的节能，与传统处理器相比，总体加速比为1.12倍，总体节能为1.11倍。
Processing-in-memory (PIM) provides high bandwidth, massive parallelism, and high energy efficiency by implementing computations in main memory, therefore eliminating the overhead of data movement between CPU and memory. While most of the recent work focused on PIM in DRAM memory with 3D die-stacking technology, we propose to leverage the unique features of emerging non-volatile memory (NVM), such as resistance-based storage and current sensing, to enable efficient PIM design in NVM. We propose Pinatubo1, a Processing In Non-volatile memory ArchiTecture for bUlk Bitwise Operations. Instead of integrating complex logic inside the cost-sensitive memory, Pinatubo redesigns the read circuitry so that it can compute the bitwise logic of two or more memory rows very efficiently, and support one-step multi-row operations. The experimental results on data intensive graph processing and database applications show that Pinatubo achieves a ~500 x speedup, ~28000x energy saving on bitwise operations, and 1.12× overall speedup, 1.11× overall energy saving over the conventional processor.