Time-multiplexed System-on-Chip using Fault-tolerant Astrocyte-Neuron Networks
Time-multiplexed System-on-Chip using Fault-tolerant Astrocyte-Neuron Networks
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DOI：
10.1109/ssci.2018.8628710
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发表时间：
2018-11
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通讯作者：
Anju P. Johnson;Junxiu Liu;Alan G. Millard;Shvan Karim;A. Tyrrell;J. Harkin;J. Timmis;L. McDaid;D. Halliday
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文献类型：
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作者：
Anju P. Johnson;Junxiu Liu;Alan G. Millard;Shvan Karim;A. Tyrrell;J. Harkin;J. Timmis;L. McDaid;D. Halliday
基于脉冲的大脑激发系统已经显示出实现内部稳定的巨大能力，被广泛称为动态平衡。这种能力使他们成为下一代计算神经科学的最佳候选者，因为他们弥合了神经科学和机器学习之间的差距。尖峰神经网络(SNN)是第三代人工神经网络(ANN)，它使用离散的尖峰事件来操作，有助于建立一类生物现实的神经元模型来进行计算。尖峰星形胶质细胞-神经元网络(SANN)具有与大脑自我修复相关的特征属性。尽管SNN在理论上比第二代ANN更强大，但它们并没有被广泛使用，因为它们在普通硬件上的实现是计算密集型的。相反，由于现代硬件的能力，如工作在MHz和GHz范围内的现场可编程门阵列，促进了SNN的实时和比实时更快的仿真。在这项工作中，我们利用实时硬件计算的优势克服了SNN的计算开销，利用时分复用设计了一种自修复尖峰星形胶质细胞神经网络(SPANER)芯片，该芯片适合用户选择任务，强调容错，针对安全关键应用。我们在Xilinx Artix-7上实现的SANN系统上演示了所提出的方法。所提出的体系结构具有最小的硬件占用、功耗分布和实时计算能力，增强了其在受限应用中的可用性。
Spike-based brain-inspired systems have shown an immense capability to achieve internal stability, widely referred to as homeostasis. This ability enrols them as the best candidate for next-generation computational neuroscience as they bridge the gap between neuroscience and machine learning. Spiking Neural Networks (SNN), a third generation Artificial Neural Network (ANN), which operates using discrete events of spikes, contributes to a category of biologically-realistic models of neurons to carry out computations. Spiking Astrocyte-Neuron Networks (SANN) have a characteristic attribute homologous to brain self-repair. Although SNNs are more powerful in theory than 2nd generation ANNs, they are not widely in use as their implementations on normal hardware are computationally-intensive. On the contrary, due to the capability of modern hardware such as FPGAs, which operates in MHz and GHz range, facilitates real-time and faster-than-real-time simulations of SNNs. In this work, we overcome the computational overhead of the SNNs using the benefits of real-time hardware computations, utilizing time-multiplexing to design a Self-rePairing spiking Astrocyte Neural NEtwoRk (SPANNER) chip, generic to users‘ choice of task, emphasizing fault-tolerance, targeting safety-critical applications. We demonstrate the proposed methodology on a SANN system implemented on Xilinx Artix-7 FPGA. The proposed architecture has minimal hardware footprints, power dissipation profile and real-time computational capability, enhancing its usability in constrained applications.