Prototyping a Globally Asynchronous Locally Synchronous Network-On-Chip on a Conventional FPGA Device Using Synchronous Design Tools
Prototyping a Globally Asynchronous Locally Synchronous Network-On-Chip on a Conventional FPGA Device Using Synchronous Design Tools
复制标题
使用同步设计工具在传统 FPGA 器件上对全局异步本地同步片上网络进行原型设计
DOI：
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发表时间：
2006
期刊：
影响因子：
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通讯作者：
J. Nurmi
中科院分区：
文献类型：
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作者：
Xin Wang;T. Ahonen;J. Nurmi
描述了一个四节点全局异步局部同步片上网络的FPGA原型。用于全球通信的网络在链路级异步操作，在节点内同步操作。两个C元件控制管线构成异步部分的控制逻辑。介绍了利用标准同步设计工具在FPGA上实现C元件和异步仲裁器
An FPGA prototype of a four-node globally-asynchronous locally-synchronous network-on-chip is described. The network for global communication operates asynchronously at the link level and synchronously within a node. Two C-element control pipelines constitute the control logic for the asynchronous part. C-element and asynchronous arbiter realizations on FPGA using standard synchronous design tools are presented