Switching activity calculation of VLSI adders
Switching activity calculation of VLSI adders
复制标题
VLSI 加法器的开关活动计算
DOI：
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发表时间：
2009
期刊：
影响因子：
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通讯作者：
V. Oklobdzija
中科院分区：
文献类型：
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作者：
D. Baran;M. Aktan;Hossein Karimiyan;V. Oklobdzija
在计算数字电路的能量时，使用精确的开关活动率在所有的内部节点被认为是导致在使用平均switching activity.We的情况下，比较两种方法的Kogge-Stone加法器实现与Weinberger和Ling加法递归的准确性。在65 nm、45 nm、32 nm和22 nm工艺节点上，分别采用精确和平均开关活动，对能量/时延估计技术的准确性进行了研究。即使这样，在22纳米技术节点下，64位Kogge-Stone加法器的最坏情况下估计能量的误差也低于15%。所有节点的时延估计误差小于6%。我们的发现是，使用平均开关活动不会产生大的误差，同时大大简化了估计过程。
Using exact switching activity rates at all internal nodes when calculating energy of digital circuits is believed to result in improved accuracy over to the use of average switching activity.We compare the two approaches in the case of the Kogge-Stone adder implemented with Weinberger and Ling addition recurrences. The difference between the two is less than 4%.Further we examined the accuracy of the energy/delay estimation technique when using exact and average switching activities in 65nm, 45nm, 32nm and 22nm technology nodes. Even then the worse case error in estimating energy is under 15% at 22nm technology node for 64-bit Kogge-Stone adder. The error in delay estimation is less than 6% for all the nodes. Our finding is that using average switching activity does not yield large errors while simplifying the estimation process greatly.