Optimization of design and technology for uncooled poly-SiGe microbolometer arrays
Optimization of design and technology for uncooled poly-SiGe microbolometer arrays
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非制冷多晶硅Ge微测辐射热计阵列的设计和技术优化
DOI：
10.1117/12.478840
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发表时间：
2002
期刊：
影响因子：
--
通讯作者：
C. van Hoof
中科院分区：
文献类型：
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作者：
V. Leonov;N. Perova;J. Vermeiren;B. Grietens;C. Goessens;P. de Moor;C. van Hoof
多晶SiGe微测热计阵列的性能特征是设计和技术优化的主题，在这项工作中，将阵列推向生产。根据LWIR表征结果，在线性128像素阵列中，最佳的60微米像素、0.26微米厚的非优化测热计设计，在时间常数为11 ms时，NETD已达到90 mK。用0.26…0.13微米薄聚sige制成的50、60和75微米像素辐射热计的32、64和128元线性阵列在几次晶圆上的性能是计算机模拟探测器特征及其在读取偏置脉冲下特性演变的起点。在优化阵列设计参数时，还考虑了材料特性和读出参数。如果用pc程序处理，考虑到读出和加热效应，在320x240阵列中，50微米像素在17 ms的时间常数下，典型的测辐射热计特性在最新晶圆运行中获得的平均NETD为70 mK。尽管与VOx阵列相比，其tcr / 1/f噪声比更低，但其几个优势使其成为非冷却阵列非常有吸引力的候选者，即与CMOS技术完全兼容，更好的特性/价格比，电阻非均匀性s/平均值<0.2%，以及释放超薄结构的可能性。
The performance characteristics of polycrystalline SiGe microbolometer arrays are the subject of both design and technological optimizations performed in this work to move the arrays towards the production. An NETD of 90 mK at a time constant of 11 ms is already achievable for the best non-optimized 60 micrometers pixel, 0.26 micrometers thick bolometer design in a linear 128 pixel array according to the results of LWIR characterization. The performance of linear 32, 64 and 128 element arrays of 50-, 60- and 75-micrometers pixel bolometers made with 0.26...0.13 micrometers thin poly-SiGe on several wafer runs was the starting point for the computer simulation of detector features and evolution of its characteristics under reading bias pulses. The material properties and parameters of read-outs are taken into account in the optimization of the design parameters of arrays as well. The typical bolometer characteristics achieved on the latest wafer run if processed with the PC-program accounting for the read-out and heating effects, result in an average NETD of 70 mK at a time constant of 17 ms for 50 micrometers pixels in a 320x240 array. Despite less TCR-to-1/f noise ratio as compared with VOx arrays, the several advantages make poly-SiGe a very attractive candidate for an uncooled array, i.e. full compatibility with CMOS technology, better characteristics/price ratio, resistance nonuniformity s/mean <0.2%, and a possibility to release extra-thin structures.