Semi-Serial On-Chip Link Implementation for Energy Efficiency and High Throughput
Semi-Serial On-Chip Link Implementation for Energy Efficiency and High Throughput
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DOI：
10.1109/tvlsi.2011.2170228
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发表时间：
2012-12
影响因子：
2.8
通讯作者：
E. Nigussie;S. Tuuna;J. Plosila;J. Isoaho;H. Tenhunen
中科院分区：
文献类型：
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作者：
E. Nigussie;S. Tuuna;J. Plosila;J. Isoaho;H. Tenhunen
提出了一种基于新颖设计技术和电路解决方案的高吞吐量和低能耗半串行片上通信链路。该自定时链路采用高速串行/串行化和脉冲双轨编码技术设计。该链路还采用波流水线差分脉冲电流模式信令，以保持高速数据从串行器的摄入量。所提出的半串行链路，其中包括并行的位串行链路的能量效率，主要来自共享的新颖的串行器的控制电路之间的位串行链路。此外，脉冲信令与波流水线的集成，使用新的低复杂度数据有效性检测技术，以及避免数据解码逻辑也有助于降低功耗。此外，公式化的脉冲双轨编码提供了无成本地实现脉冲信令的机会。在比特级检测数据有效性的能力允许每个字确认，而不会损失传输的延迟不敏感性。建议的半串行链路进行了分析和比较，位串行和完全位并行链路的64位数据和通信距离为1至8 mm。半串行链路，其中包括8位串行链路提供72.72 Gbps的吞吐量与286 fJ/位的能量耗散为8 mm的传输。与完全位并行链路相比，它的每位能耗最低，同时实现相同的吞吐量。这些链路是使用意法半导体的65纳米技术在Cadence Analog Spectre中设计和仿真的。
A high-throughput and low-energy semi-serial on-chip communication link based on novel design techniques and circuit solutions is presented. This self-timed link is designed using high-speed serialization/deserializtion and pulse dual-rail encoding techniques. The link also employs wave-pipelined differential pulse current-mode signaling to maintain the high speed data intake from the serializer. The energy efficiency of the proposed semi-serial link, which consists of bit-serial links in parallel, mainly comes from the sharing of the novel serializer's control circuit among the bit-serial links. In addition, the integration of pulse signaling with wave-pipelining, the use of a new low-complexity data validity detection technique, and the avoidance of data decoding logic also contribute to the power reduction. Furthermore, the formulated pulse dual-rail encoding provides an opportunity to implement pulse signaling at no cost. The ability to detect data validity at bit level allows acknowledgment per word without losing the delay-insensitivity of the transmission. The proposed semi-serial link is analyzed and compared with bit-serial and fully bit-parallel links for 64-bit data and communication distances of 1 to 8 mm. The semi-serial link which consists of eight bit-serial links provides 72.72 Gbps throughput with 286 fJ/bit energy dissipation for 8 mm transmission. It dissipates the lowest energy per bit compared to fully bit-parallel links while achieving the same throughput. The links are designed and simulated in Cadence Analog Spectre using 65-nm technology from STMicroelectronics.