Measurement of interface defect states at oxidized silicon surfaces by constant‐capacitance DLTS
Measurement of interface defect states at oxidized silicon surfaces by constant‐capacitance DLTS
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DOI：
10.1116/1.570211
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发表时间：
1979-09
期刊：
影响因子：
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通讯作者：
N. Johnson;D. Bartelink;J. Mcvittie
中科院分区：
文献类型：
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作者：
N. Johnson;D. Bartelink;J. Mcvittie
单晶硅上氧化态表面的界面态分布主要由Si价带最大值以上约0.3 eV的宽峰控制。Laughlin，Joannopoulos和Chadi的理论研究表明，这个峰是由于Si-SiO2界面处的三价硅缺陷造成的。使用恒定电容DLTS和准静态电容-电压技术来表征（100）和（111）取向硅表面上的这种缺陷。这里显示：（1）在n型和p型硅的Si-SiO2界面处均存在特征缺陷，（2）对于相同制备的样品，（111）取向硅上的缺陷密度高于（100）取向硅上的缺陷密度，以及（3）可以通过在氩气或氮气环境中进行高温氧化后退火来降低缺陷密度。
The interface‐state distribution for the as‐oxidized surface on single‐crystal silicon is dominated by a broad peak centered ∠0.3 eV above the Si valence‐band maximum. Theoretical studies by Laughlin, Joannopoulos, and Chadi suggest that this peak is due to a trivalent silicon defect at the Si–SiO2 interface. Constant‐capacitance DLTS and the quasistatic capacitance–voltage technique were used to characterize this defect on (100) ‐ and (111) ‐oriented silicon surfaces. It is shown here that: (1) the characteristic defect is present at the Si–SiO2 interface on both n‐type and p‐type silicon, (2) the density of the defect is higher on (111) ‐oriented than on (100) ‐oriented silicon for identically prepared specimens, and (3) the defect density can be reduced by a high‐temperature, postoxidation anneal in either an argon or nitrogen ambient.