Compiler-in-the-loop exploration during datapath synthesis for higher quality delay-area trade-offs
Compiler-in-the-loop exploration during datapath synthesis for higher quality delay-area trade-offs
复制标题
数据路径综合期间的编译器在环探索,以实现更高质量的延迟区域权衡
DOI:
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发表时间:
2013
期刊:
影响因子:
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通讯作者:
G. Economakos
中科院分区:
文献类型:
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作者:
S. Xydis;K. Pekmestzi;D. Soudris;G. Economakos
Design space exploration during high-level synthesis targets the computation of those design solutions which form optimal trade-off points. This quest for optimal trade-offs has been focused on studying the impact of various architectural-level parameters during high-level synthesis algorithms, silently neglecting the trade-offs produced from the combined impact of behavioral-level together with architectural-level parameters. We propose a novel design space, exploration methodology that studies an extended instance of the solution space considering the effects of combining compiler- and architectural-level transformations. It is shown that exploring the design space in a global manner reveals new trade-off points, thus shifting towards higher quality design solutions. We use a combination of upper-bounding conditions together with gradient-based heuristic pruning to efficiently traverse the extended search space. Our exploration framework delivers significant quality improvements without compromising the optimality (Pareto accuracy) of the discovered solutions, together with significant runtime reductions compared to exploring exhaustively the solution space at every allocation scenario.
影响因子:
2
作者:
Murray A
通讯作者:
Murray A