A Study of the Optimal Data Rate for Minimum Power of I/Os
A Study of the Optimal Data Rate for Minimum Power of I/Os
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最小I/O功耗下的最佳数据速率研究
DOI：
10.1109/tcsii.2006.882348
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发表时间：
2006
期刊：
影响因子：
--
通讯作者：
C. Yang
中科院分区：
文献类型：
--
作者：
H. Hatamkhani;C. Yang
每秒千兆位并行I/O链路的功耗是集成电路总功耗的重要组成部分。本文简要介绍了每个I/O链路的最佳数据速率，在该速率下功耗最小。数据速率表示为传输信道频率响应的函数。考虑片上电子开关对功率的影响取决于IC的工艺技术。分析结果表明，基于信道的频率响应存在数据速率的上限，并且更先进的工艺技术正在接近上限
Power dissipation of multi-gigabit per second parallel input-output (I/O) links is an integral part of total integrated circuits (IC) power dissipation. This brief presents an optimal data rate per I/O link at which the power dissipation is minimized. The data rate is expressed as a function of the transmission channel's frequency response. The impact of considering the power due to on-chip electronic switching depends on the process technology of the IC. The analysis results show that an upper bound for the data rate exists based on the channel's frequency response and that the upper bound is being approached with more advanced process technologies