Reliability-aware design to suppress aging
Reliability-aware design to suppress aging
复制标题
具有可靠性意识的设计可抑制老化
DOI：
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发表时间：
2016
期刊：
影响因子：
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通讯作者：
J. Henkel
中科院分区：
文献类型：
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作者：
H. Amrouch;Behnam Khaleghi;A. Gerstlauer;J. Henkel
由于老化，电路的可靠性已变得非常具有挑战性。可靠性感知电路设计流程实际上并不存在，甚至研究也处于起步阶段。在本文中，我们建议把老化意识的EDA工具流的基础上所谓的退化意识的细胞库。这些库包括在老化对晶体管的阈值电压（Vth）和载流子迁移率（μ）两者的影响下的栅极/单元的详细延迟信息。这与仅考虑Vth的现有技术不同。我们展示了如何忽略衰减导致平均低估19%的保护带。我们的研究表明，老化的影响很大程度上取决于栅极的工作条件（即输入信号压摆和输出负载电容），而不仅仅是晶体管的占空比。忽视这一事实会导致采用不足的保护带，从而在寿命期间无法维持可靠性。我们证明了退化感知库和工具流是不可或缺的，不仅准确地估计保护带，但也有效地包含它们。通过在逻辑合成期间考虑老化退化，可以获得显著更有弹性的电路。我们进一步量化老化对图像处理电路退化的影响。这远远超出了调查老化方面的路径延迟。我们表明，在没有任何保护带的标准设计中，老化仅一年后就会导致不可接受的图像质量。相比之下，如果为合成工具提供退化感知单元库，则高图像质量可持续10年（即使在最坏情况下老化且没有保护带）。因此，使用我们的方法，可以有效地抑制衰老。
Due to aging, circuit reliability has become extraordinary challenging. Reliability-aware circuit design flows do virtually not exist and even research is in its infancy. In this paper, we propose to bring aging awareness to EDA tool flows based on so-called degradation-aware cell libraries. These libraries include detailed delay information of gates/cells under the impact that aging has on both threshold voltage (Vth) and carrier mobility (μ) of transistors. This is unlike state of the art which considers Vth only. We show how ignoring ß degradation leads to underestimating guard-bands by 19% on average. Our investigation revealed that the impact of aging is strongly dependent on the operating conditions of gates (i.e. input signal slew and output load capacitance), and not solely on the duty cycle of transistors. Neglecting this fact results in employing insufficient guard-bands and thus not sustaining reliability during lifetime. We demonstrate that degradation-aware libraries and tool flows are indispensable for not only accurately estimating guardbands, but also efficiently containing them. By considering aging degradations during logic synthesis, significantly more resilient circuits can be obtained. We further quantify the impact of aging on the degradation of image processing circuits. This goes far beyond investigating aging with respect to path delays solely. We show that in a standard design without any guardbanding, aging leads to unacceptable image quality after just one year. By contrast, if the synthesis tool is provided with the degradation-aware cell library, high image quality is sustained for 10 years (even under worst-case aging and without a guardband). Hence, using our approach, aging can be effectively suppressed.