Wafer Level Bonding Technology for 3D Stacked IC

Wafer Level Bonding Technology for 3D Stacked IC
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DOI:
10.6117/kmeps.2013.20.1.007
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发表时间:
2013-01-01
期刊:
Jornal of the Microelectronics and Packaging Society
影响因子:
--
通讯作者:
Kim, Sungdong
Kim, Sungdong
中科院分区:
其他
文献类型:
--
作者:
Cho, Young Hak;Kim, Sungdong

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3D stacked IC is one of the promising candidates which can keep Moore's law valid for next decades. IC can be stacked through various bonding technologies and they were reviewed in this report, for example, wafer direct bonding and atomic diffusion bonding, etc. As an effort to reduce the high temperature and pressure which were required for high bonding strength in conventional Cu-Cu thermo-compression bonding, surface activated bonding, solid liquid inter-diffusion and direct bonding interface technologies are actively being developed.