An efficient multiplier-less architecture for 2-D convolution with quadrant symmetric kernels
An efficient multiplier-less architecture for 2-D convolution with quadrant symmetric kernels
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DOI:
10.1016/j.vlsi.2006.07.001
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发表时间:
2007-07
期刊:
影响因子:
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通讯作者:
Ming Z. Zhang;V. Asari
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文献类型:
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作者:
Ming Z. Zhang;V. Asari