A Critical Examination of Frequency-Fixed Second-Order Generalized Integrator-Based Phase-Locked Loops

A Critical Examination of Frequency-Fixed Second-Order Generalized Integrator-Based Phase-Locked Loops
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DOI:
10.1109/tpel.2017.2674973
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发表时间:
2017-02
影响因子:
6.7
通讯作者:
S. Golestan;S. Mousazadeh;J. Guerrero;J. Vasquez
S. Golestan;S. Mousazadeh;J. Guerrero;J. Vasquez
中科院分区:
工程技术1区
文献类型:
--
作者:
S. Golestan;S. Mousazadeh;J. Guerrero;J. Vasquez

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大量单相锁相环(PLL)的实现涉及创建虚拟正交信号。一个流行的方法是使用二阶广义积分器为基础的正交信号发生器(SOGI-QSG),因为它会导致一个可接受的速度/精度的折衷。基于SOGI-QSG的PLL(或简称为SOGI-PLL)在其标准形式中涉及用于在频率漂移下调整SOGI谐振频率的频率反馈回路。最近的一些研究工作已经报道,通过去除频率反馈环,可以显著增强SOGI-PLL的速度/精度折衷。在这些方法中,SOGI谐振频率被固定在标称频率,并且采用用于校正在非标称频率下引起的误差的补偿策略。这封信的主要目的是对基于固定频率SOGI的PLL进行批判性分析,以强调其真实的优点和缺点。
The implementation of a large number of single-phase phase-locked loops (PLLs) involves creating a fictitious quadrature signal. A popular approach for this purpose is using a second-order generalized integrator-based quadrature signal generator (SOGI-QSG) because it results in an acceptable speed/accuracy tradeoff. The SOGI-QSG-based PLL (or briefly the SOGI-PLL), in its standard form, involves a frequency feedback loop for adjusting the SOGI resonance frequency under frequency drifts. Some recent research works have reported that the speed/accuracy tradeoff of the SOGI-PLL can be considerably enhanced by removing the frequency feedback loop. In these methods, the SOGI resonance frequency is fixed at the nominal frequency, and a compensation strategy for correcting errors caused under off-nominal frequencies is employed. The main aim of this letter is to provide a critical analysis of frequency-fixed SOGI-based PLLs to highlight their real advantages and disadvantages.