Automatic Generation of Application-Specific FPGA Overlays with RapidWright
Automatic Generation of Application-Specific FPGA Overlays with RapidWright
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使用 RapidWright 自动生成特定于应用的 FPGA 覆盖层
DOI：
10.1109/icfpt47387.2019.00053
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发表时间：
2019
期刊：
影响因子：
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通讯作者：
C. Bobda
中科院分区：
文献类型：
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作者：
Joel Mandebi Mbongue;Danielle Tchuinkou Kwadjo;C. Bobda
在本文中，我们介绍了特定应用的FPGA覆盖（AS-Overlays），这是一种从高级描述语言应用程序自动生成覆盖的新方法，可以实现裸机性能。我们的方法是基于从数据流应用程序中自动提取硬件内核。然后利用提取的内核生成特定于应用程序的硬件加速器。覆盖层的重新配置是用RapidWright完成的，它允许绕过HDL设计流程。通过原型，我们展示了我们的方法的可行性和相关性。实验表明，与最先进的FPGA覆盖层相比，生产率提高了20倍，同时实现了比直接FPGA实现高1.33倍的Fmax，并且与裸机相比，资源和功耗更低的可能性。
In this paper, we introduce Application-Specific FPGA Overlays (AS-Overlays), a new approach to automatically generate overlays from high-level description language applications that can achieve bare-metal performances. Our approach is based on the automatic extraction of hardware kernels from data flow applications. Extracted kernels are then leveraged for application-specific generation of hardware accelerators. The reconfiguration of the overlay is done with RapidWright which allows to bypass the HDL design flow. Through prototyping, we demonstrated the viability and relevance of our approach. Experiments show a productivity improvement up to 20× compared to the state of the art FPGA overlays, while achieving over 1.33× higher Fmax than direct FPGA implementation and the possibility of lower resource and power consumption compared to bare metal.