Low-Temperature High-Density Chip-Stack Interconnection Using Compliant Bump
Low-Temperature High-Density Chip-Stack Interconnection Using Compliant Bump
复制标题
使用顺应凸点的低温高密度芯片堆叠互连
DOI:
10.1109/ectc.2007.373861
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发表时间:
2007
期刊:
影响因子:
--
通讯作者:
T. Asano
中科院分区:
文献类型:
--
作者:
N. Watanabe;T. Asano
We demonstrate low-temperature high-density chip-stack interconnection using compliant bump. Low temperature chip stacking was carried out by two methods; (1) plasma cleaning of compliant bumps, (2) mechanical caulking using compliant bump and doughnut-shaped electrode. The latter method is very effective in realizing chip stacking even at room temperature.