Study of nanoimprint lithography (NIL) for HVM of memory devices
Study of nanoimprint lithography (NIL) for HVM of memory devices
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用于存储器件 HVM 的纳米压印光刻 (NIL) 研究
DOI：
10.1117/12.2257951
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发表时间：
2017
期刊：
影响因子：
--
通讯作者：
W. Jung
中科院分区：
文献类型：
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作者：
T. Kono;M. Hatano;H. Tokue;K. Kobayashi;Masato Suzuki;K. Fukuhara;M. Asano;T. Nakasugi;E. Choi;W. Jung
人们需要一种低成本的替代光刻技术来满足半导体器件不断减小的特征尺寸。纳米压印光刻(NIL)是替代光刻技术的候选技术之一，具有分辨率高、临界尺寸(CD)均匀、线条边缘粗糙度(LER)低等优点。另一方面，NIL的关键问题是缺陷性、覆盖和吞吐量。为了将NIL引入HVM，有必要同时克服这三个挑战。[4]-[12]在我们之前的研究中，我们报告了在试点生产线工具FPA-1100 NZ2上NIL工艺缺陷的显著改善。我们已经描述了2x nm半间距的NIL工艺越来越接近HVM的目标。[12]在这项研究中，我们报道了最近对NIL工艺性能的评估，以判断NIL工艺在存储器件制造中的适用性。详细地说，CD的均匀性和LER小于2 nm。该测试仪的贴合精度小于7 nm。在每小时15个晶片的吞吐量下，缺陷水平已达到低于1ps./cm2。
A low cost alternative lithographic technology is desired to meet the decreasing feature size of semiconductor devices. Nano-imprint lithography (NIL) is one of the candidates for alternative lithographic technologies.[1][2][3] NIL has such advantages as good resolution, critical dimension (CD) uniformity and low line edge roughness (LER). On the other hand, the critical issues of NIL are defectivity, overlay, and throughput. In order to introduce NIL into the HVM, it is necessary to overcome these three challenges simultaneously.[4]-[12] In our previous study, we have reported a dramatic improvement in NIL process defectivity on a pilot line tool, FPA-1100 NZ2. We have described that the NIL process for 2x nm half pitch is getting closer to the target of HVM.[12] In this study, we report the recent evaluation of the NIL process performance to judge the applicability of NIL to memory device fabrications. In detail, the CD uniformity and LER are found to be less than 2nm. The overlay accuracy of the test device is less than 7nm. A defectivity level of below 1pcs./cm2 has been achieved at a throughput of 15 wafers per hour.