Novel grid-based power routing scheme for regular controllable-polarity FET arrangements
Novel grid-based power routing scheme for regular controllable-polarity FET arrangements
复制标题
用于常规可控极性 FET 布置的新颖的基于网格的电源路由方案
DOI：
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发表时间：
2014
期刊：
影响因子：
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通讯作者：
G. Micheli
中科院分区：
文献类型：
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作者：
O. Zografos;P. Gaillardon;G. Micheli
在过去的几年里，极性可控晶体管已经成为当前CMOSFinFET的合适继承者。由于增加了极性端子，因此需要新的物理设计技术。我们提出了一种新的基于网格的功率布线方案，能够减轻极性端子的影响。逻辑单元被组织成规则的排列，并使用新的功率布线方案容易地配置。所使用的布局和布线技术的影响是根据布线金属分布、速度和区域性能来衡量的。使用商用工具对基准电路进行了综合、布局和布线，并提取了性能指标。布局和布线后结果显示，与基于22 nm FinFET常规布局的设计相比，电路速度提高了28%。
Polarity-controllable transistors have emerged in the last few years as an adequate successor of current CMOS FinFETs. Due to the additional polarity terminal, novel physical design techniques are required. We present a novel grid-based power routing scheme able to mitigate the polarity terminal impact. The logic cells are organized in regular arrangements and easily configured using the novel power routing scheme. The impact of the placement and routing techniques used is gauged in terms of routing metal distribution, speed and area performance. Benchmark circuits are synthesized, placed and routed using commercial tools and performances are extracted. Post place and route results show 28% faster circuits compared to 22nm FinFET regular layout-based designs.