ChameleonDB: a key-value store for optane persistent memory

ChameleonDB: a key-value store for optane persistent memory
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DOI:
10.1145/3447786.3456237
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发表时间:
2021-04
期刊:
Proceedings of the Sixteenth European Conference on Computer Systems
影响因子:
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通讯作者:
Wenhui Zhang;Xingsheng Zhao;Song Jiang;Hong Jiang
Wenhui Zhang;Xingsheng Zhao;Song Jiang;Hong Jiang
中科院分区:
其他
文献类型:
--
作者:
Wenhui Zhang;Xingsheng Zhao;Song Jiang;Hong Jiang

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Intel的Optane DC持久记忆(Optane PMEM)的出现引起了人们对建立持久键值(KV)商店的兴趣,从而利用了其高吞吐量和低潜伏期的优势。基本上,一种具有两个不同属性的混合存储设备。块存储设备。对于基于LSM的块设备,由于本文中的属性会导致更高的读取延迟,我们提出了ChameleondB,这是一种专门针对此重要的混合记忆/存储设备的KV商店设计一个设计中的属性。在系统崩溃之后,在背景中实现了短期恢复时间。与基于LSM-tree的KV商店设计相比,将第3.3倍的吞吐量读取约60%。 ChameleondB持续的哈希表设计提供6.4倍更高的写入吞吐量。
The emergence of Intel's Optane DC persistent memory (Optane Pmem) draws much interest in building persistent key-value (KV) stores to take advantage of its high throughput and low latency. A major challenge in the efforts stems from the fact that Optane Pmem is essentially a hybrid storage device with two distinct properties. On one hand, it is a high-speed byte-addressable device similar to DRAM. On the other hand, the write to the Optane media is conducted at the unit of 256 bytes, much like a block storage device. Existing KV store designs for persistent memory do not take into account of the latter property, leading to high write amplification and constraining both write and read throughput. In the meantime, a direct re-use of a KV store design intended for block devices, such as LSM-based ones, would cause much higher read latency due to the former property. In this paper, we propose ChameleonDB, a KV store design specifically for this important hybrid memory/storage device by considering and exploiting these two properties in one design. It uses LSM tree structure to efficiently admit writes with low write amplification. It uses an in-DRAM hash table to bypass LSM-tree's multiple levels for fast reads. In the meantime, ChameleonDB may choose to opportunistically maintain the LSM multi-level structure in the background to achieve short recovery time after a system crash. ChameleonDB's hybrid structure is designed to be able to absorb sudden bursts of a write workload, which helps avoid long-tail read latency. Our experiment results show that ChameleonDB improves write throughput by 3.3× and reduces read latency by around 60% compared with a legacy LSM-tree based KV store design. ChameleonDB provides performance competitive even with KV stores using fully in-DRAM index by using much less DRAM space. Compared with CCEH, a persistent hash table design, ChameleonDB provides 6.4× higher write throughput.