High frequency 700V PowerBrane LIGBTs in 0.35µm bulk CMOS technology
High frequency 700V PowerBrane LIGBTs in 0.35µm bulk CMOS technology
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DOI：
10.1109/ispsd.2009.5158063
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发表时间：
2009-06
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影响因子：
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通讯作者：
T. Trajkovic;N. Udugampola;V. Pathirana;A. Mihaila;F. Udrea;G. Amaratunga;B. Koutny;K. Ramkumar;S. Geha
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文献类型：
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作者：
T. Trajkovic;N. Udugampola;V. Pathirana;A. Mihaila;F. Udrea;G. Amaratunga;B. Koutny;K. Ramkumar;S. Geha
本文报道了一种采用体硅膜技术实现的自隔离、横向IGBT装置，该装置具有高电压阻断能力（700V）、高导通电流密度（Vds=4V时150A/cm2）和快速关断（≪50ns）。该器件采用标准的5V， 0.35 μ m体CMOS工艺在8块″晶圆上制造，并添加了两个掩模：i)用于HV阻塞区域的n-drift和ii)背面Deep RIE （DRIE）用于膜形成。与我们之前报道的SOI上的PowerBrane相比[1,2]，体硅灯上的PowerBrane由于更好的散热和更强大的运行（包括非箝位电感开关和短路能力），提供了更高的最大功率密度。通过HTRB测试对塑料封装的大体积硅PowerBrane芯片的可靠性进行了评估，在超过1000小时的压力下没有观察到任何故障。用于选择性去除部分硅衬底（PowerBrane技术的关键特征）的drive步骤，为单片集成功率ic中的高压功率灯(s)与控制电路的隔离提供了有效的解决方案。此外，使用大块硅晶片代替更昂贵的SOI衬底可以在不影响性能的情况下降低基于powerbranepower ic的制造成本。
A self-isolating, lateral IGBT device with high voltage blocking capability (≫700V), high on-state current density (150A/cm2 at Vds=4V) and very fast turn-off (≪50ns), realized in membrane on bulk Si technology is reported here. The device has been manufactured using a standard 5V, 0.35µm bulk CMOS process on 8″ wafers with the addition of two masks: i) n-drift for the HV blocking region and ii) back-side Deep RIE (DRIE) for membrane formation. In comparison to PowerBrane on SOI, earlier reported by us [1,2], PowerBrane on bulk Si LIGBTs offer higher maximum power density due to better thermal dissipation and more robust operation including unclamped inductive switching and short circuit capability. Reliability of bulk-Si PowerBrane chips in plastic packages has been evaluated through HTRB tests and no failures have been observed after more than 1000 hours of stress. The DRIE step used for selective removal of portions of the silicon substrate, the key feature of PowerBrane technology, offers an effective solution for isolation of the high-voltage power LIGBT(s) from the control circuitry in monolithically integrated Power ICs. In addition, use of bulk Si wafers instead of more expensive SOI substrates reduces the manufacturing costs of PowerBrane-based Power ICs without compromising performance.