Power Management for Multicore Processors via Heterogeneous Voltage Regulation and Machine Learning Enabled Adaptation
Power Management for Multicore Processors via Heterogeneous Voltage Regulation and Machine Learning Enabled Adaptation
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DOI：
10.1109/tvlsi.2019.2923911
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发表时间：
2019-07
影响因子：
2.8
通讯作者：
Xin Zhan;Jianhao Chen;E. Sánchez-Sinencio;Peng Li
中科院分区：
文献类型：
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作者：
Xin Zhan;Jianhao Chen;E. Sánchez-Sinencio;Peng Li
这项工作基于这样的愿景，即通过从板载开关电压调节器(VRS)到片上开关电压调节器(VRS)，最后到分布式片上线性VRS网络的异类电压处理链，可以最好地实现最终的电源完整性和效率。因此，我们提出了一种异类电压调节(HVR)架构，该架构包含了在响应时间、大小和效率方面具有互补特性的稳压器。通过探索HVR中丰富的异构性和可调性，我们开发了系统的负载感知电源管理策略，以适应多个时间尺度上的负载变化，从而显著提高系统的电源效率，同时为电源完整性提供保证。硬件加速机器学习(ML)对非均匀空间工作负载分布的预测进一步支持了所提出的技术，以便在精细的时间粒度上更准确地适应HVR。基于PARSEC基准测试套件的评估表明，与使用片外和片上开关电压调节器的传统静态两级电压调节相比，所提出的自适应三级HVR平均降低了高达23.9%和15.7%的系统总能量消耗。与三级静态HVR相比，我们的运行控制平均降低了17.9%和12.2%的系统能量。此外，提出的最大似然预测提供了高达4.1%的系统能量减少。
This work is based on the vision that the ultimate power integrity and efficiency may be best achieved via a heterogeneous chain of voltage processing starting from onboard switching voltage regulators (VRs), to on-chip switching VRs, and finally to networks of distributed on-chip linear VRs. As such, we propose a heterogeneous voltage regulation (HVR) architecture encompassing regulators with complimentary characteristics in response time, size, and efficiency. By exploring the rich heterogeneity and tunability in HVR, we develop systematic workload-aware power management policies to adapt heterogeneous VRs with respect to workload change at multiple temporal scales to significantly improve system power efficiency while providing a guarantee for power integrity. The proposed techniques are further supported by hardware-accelerated machine learning (ML) prediction of nonuniform spatial workload distributions for more accurate HVR adaptation at fine time granularity. Our evaluations based on the PARSEC benchmark suite show that the proposed adaptive three-stage HVR reduces the total system energy dissipation by up to 23.9% and 15.7% on average compared with the conventional static two-stage voltage regulation using off-chip and on-chip switching VRs. Compared with the three-stage static HVR, our runtime control reduces system energy by up to 17.9% and 12.2% on average. Furthermore, the proposed ML prediction offers up to 4.1% reduction of system energy.