Artificial neural networks in hardware A survey of two decades of progress
Artificial neural networks in hardware A survey of two decades of progress
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DOI：
10.1016/j.neucom.2010.03.021
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发表时间：
2010-12-01
期刊：
影响因子：
6
通讯作者：
Saha, Indranil
中科院分区：
文献类型：
--
作者：
Misra, Janardari;Saha, Indranil
本文全面概述了人工神经网络 (ANN) 模型（称为硬件神经网络 (HNN)）的硬件实现，该模型在学术研究中作为原型以及在商业用途中出现。尽管该技术的商业应用相对较慢，但 HNN 研究在过去二十多年中取得了稳步进展。我们研究了所有主要 ANN 模型硬件设计方法和应用领域的整体进展。我们概述了将 ANN 模型映射到需要计算和通信的紧凑可靠且节能的硬件上的底层设计方法，并调查了广泛的说明性示例研究了神经元级别的芯片设计方法（数字模拟混合和基于 FPGA）以及实现完整 ANN 模型的神经芯片 我们具体讨论了神经形态设计，包括尖峰神经网络硬件 蜂窝神经网络实现 可重构基于 FPGA 的实现，特别是随机 ANN 模型和光学实现 采用位片脉动和 SIMD 架构实现的并行数字实现 用于关联神经存储器和基于 RAM 的实现 我们跟踪最新趋势并探索未来潜在的研究方向 (C) 2010 Elsevier BV 版权所有
This article presents a comprehensive overview of the hardware realizations of artificial neural network (ANN) models known as hardware neural networks (HNN) appearing in academic studies as prototypes as well as in commercial use HNN research has witnessed a steady progress for more than last two decades though commercial adoption of the technology has been relatively slower We study the overall progress in the field across all major ANN models hardware design approaches and applications We outline underlying design approaches for mapping an ANN model onto a compact reliable and energy efficient hardware entailing computation and communication and survey a wide range of illustrative examples Chip design approaches (digital analog hybrid and FPGA based) at neuronal level and as neurochips realizing complete ANN models are studied We specifically discuss in detail neuromorphic designs including spiking neural network hardware cellular neural network implementations reconfigurable FPGA based implementations in particular for stochastic ANN models and optical implementations Parallel digital implementations employing bit-slice systolic and SIMD architectures implementations for associative neural memories and RAM based implementations are also outlined We trace the recent trends and explore potential future research directions (C) 2010 Elsevier BV All rights reserved