Suppression of DC bias stress-induced degradation of organic field-effect transistors using postannealing effects
Suppression of DC bias stress-induced degradation of organic field-effect transistors using postannealing effects
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DOI：
10.1063/1.2031932
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发表时间：
2005-08
影响因子：
4
通讯作者：
T. Sekitani;S. Iba;Y. Kato;Y. Noguchi;T. Someya;T. Sakurai
中科院分区：
文献类型：
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作者：
T. Sekitani;S. Iba;Y. Kato;Y. Noguchi;T. Someya;T. Sakurai
我们制作并五苯场效应晶体管（FET），在连续的直流偏置应力下表现出非常小的性能退化。并五苯场效应晶体管是在聚酰亚胺薄膜上制造的，带有聚酰亚胺栅极介电层，然后用聚氯对二甲苯钝化层封装，从而形成非常灵活和耐热的器件。当这种器件在氮气环境中在140°C下退火12 h时，即使在施加VDS=VGS=− 40 V的连续直流偏压11 h后，其源漏电流的变化也为3±1%。此外，它们的迁移率通过退火后效应从0.27cm 2 scinV增加到0.36cm 2 scinV，并且它们的开/关比也从103增加到106。
We fabricate pentacene field-effect transistors (FETs) showing a very small degradation in performance under a continuous DC bias stress. Pentacene FETs are manufactured on polyimide films with polyimide gate dielectric layers, and then encapsulated by poly-chloro-para-xylylene passivation layers, resulting in very flexible and heat-resistant devices. When such devices are annealed at 140°C for 12h in a nitrogen environment, the change in their source-drain current is 3±1% even after the application of continuous DC voltage biases of VDS=VGS=−40V for 11h. Furthermore, their mobility is increased by postannealing effects from 0.27cm2∕Vsto0.36cm2∕Vs and their on/off ratio is also increased from 103 to 106.