An Empirically Guided Optimization Framework for FPGA OpenCL
An Empirically Guided Optimization Framework for FPGA OpenCL
复制标题
FPGA OpenCL 的经验引导优化框架
DOI：
10.1109/fpt.2018.00018
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发表时间：
2018
期刊：
影响因子：
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通讯作者：
M. Herbordt
中科院分区：
文献类型：
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作者：
A. Sanaullah;Rushi Patel;M. Herbordt
FPGA已被证明具有很高的性能，尤其是性能，但通常由FPGA专家以手工调整的HDL代码为代价。 OpenCL是提高性能效果的领先行业努力。但是，尽管人们认识到，使用已发表的最佳实践优化OpenCL代码对于实现良好性能至关重要，但即使优化的代码到目前为止，很少与HDL代码的代码或使用GPU等竞争技术可用的代码匹配。在本文中，我们提出了一系列系统的和经验指导的代码优化，以增强当前最佳实践并大大提高实现的性能。我们的工作表征并衡量所有这些优化的影响。这使程序员不仅可以在优化自己的内核时遵循脚本，还可以为开发自动传动器自动执行优化开辟道路。我们还证明，通过将这些提出的代码设计实践应用于许多并行计算矮人，我们优化的内核分别超过1.2倍和5倍的FPGA OPENCL实现。此外，我们的优化使OPENCL FPGA代码能够在大约2倍的GPU和HDL的最佳当前当量代码中始终达到性能。据我们所知，这至少要比OpenCL FPGA优化的以前的特征要好2倍。
FPGAs have been demonstrated to be capable of very high performance, especially power-performance, but generally at the cost of hand-tuned HDL code by FPGA experts. OpenCL is the leading industry effort in improving performance-programmability. But while it is recognized that optimizing OpenCL code using published best practices is critical to achieving good performance, even optimized code has so far rarely matched that of HDL code, or that available with competing technologies such as GPUs. In this paper we propose a series of systematic and empirically guided code optimizations that augment current best practices and substantially improve achieved performance. Our work characterizes and measures the impact of all of these optimizations. This enables programmers to not only follow a script when optimizing their own kernels, but also opens the way for the development of autotuners to perform optimizations automatically. We also demonstrate that, by applying these proposed code design practices to a number of parallel computing dwarfs, our optimized kernels outperform CPU and previous FPGA OpenCL implementations by 1.2x and 5x respectively. Moreover, our optimizations enable OpenCL FPGA codes to consistently achieve performance within striking distance of approximately 2x best current equivalent code for GPUs and HDL. To the best of our knowledge, this is at least 2x better than previous characterizations of OpenCL FPGA optimizations.