A fault simulation method for crosstalk faults in synchronous sequential circuits
A fault simulation method for crosstalk faults in synchronous sequential circuits
复制标题
同步时序电路串扰故障的故障模拟方法
DOI：
10.1109/ftcs.1996.534592
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发表时间：
1996
期刊：
影响因子：
--
通讯作者：
K. Kinoshita
中科院分区：
文献类型：
--
作者：
N. Itazaki;Yasutaka Idomoto;K. Kinoshita
随着超大规模集成电路规模的缩小和逻辑门开关时间的缩短，串扰故障成为测试中的一个重要问题。如果串扰脉冲由内部噪声源激发，则串扰脉冲倾向于被认为对于同步时序电路是无害的，因为在数据线上生成的串扰脉冲可以通过时钟来消除。然而，在时钟线或复位线上产生的串扰脉冲可能导致电路错误操作。分析了串扰故障方案，并基于该方案设计了故障模拟器，以评估串扰故障的影响。我们认为串扰故障是一条数据线和时钟线之间意外的强电容耦合。由于我们必须考虑除了逻辑值之外的时序，因此在我们的故障仿真中使用了单位延迟模型。我们在一些基准电路上进行的实验表明，故障激活率和故障检测率随电路特性的不同而变化很大。高达80%的故障检测率从我们的模拟随机生成的测试向量。
With the scaling down of VLSI size and the reducing switching time of logic gates, crosstalk faults become an important problem for testing. If a crosstalk pulse is excited by internal noise sources, the crosstalk pulse tends to be considered as harmless for synchronous sequential circuits, because generated crosstalk pulses on data lines can be eliminated by a clocking. However the crosstalk pulse generated on clock lines or reset lines can lead the circuit to erroneous operations. We analyze the crosstalk fault scheme, and contrive a fault simulator based on the scheme, in order to estimate the effect for the crosstalk fault. We consider the crosstalk fault as unexpected strong capacitive coupling between one data line and clock lines. Since we have to consider timing in addition to a logic value, a unit delay model is used in our fault simulation. Our experiments on some benchmark circuits show that fault activation rates and fault detection rates are widely varied corresponding to circuit characteristics. Up to 80% fault detection rates are obtained from our simulation with test vectors generated at random.