DC-Link Voltage Stability Analysis of Grid-Tied Converters Using DC Impedance Models

DC-Link Voltage Stability Analysis of Grid-Tied Converters Using DC Impedance Models
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使用直流阻抗模型对并网转换器进行直流链路电压稳定性分析

DOI:
10.3390/en15176247
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发表时间:
2022
期刊:
影响因子:
3.2
通讯作者:
K. Rajashekara
K. Rajashekara
中科院分区:
工程技术4区
文献类型:
--
作者:
Ravi Kumar Gaddala;Mriganka Ghosh Majumder;K. Rajashekara

文献摘要

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随着可再生能源与电网的集成,需要将多个电力电子变换器并联在一起。由于具有公共DC总线的功率转换器之间的这种互连,DC网络的等效阻抗,即,这些并联转换器的DC网络阻抗(DCNI)可能变化,并且可能导致DC链路电压(DCLV)的振荡。在文献中,基于交流侧的并网变换器(GC)的阻抗模型被很好地报道,而不包括这些变化在DCNI中。此外,锁相环(PLL)的动态在GC系统稳定性中起着重要作用。为了评估这些稳定性问题,本文提出了小信号阻抗模型,从直流侧的三相GC考虑PLL动态和DCNI的变化在不同的控制模式下运行。使用所提出的直流阻抗模型(DCIM),DCLV的稳定性分析评估的GC。通过波特图验证了当DCIM和DCNI之间的相位差大于180度时,DCIM和DCNI之间的相互作用会导致闭环变换器在PLL带宽附近工作不稳定。最后,分析开发的模型进行了验证,使用硬件在环(HIL)测试。
With the integration of renewable energy sources into the power grid, a number of power electronic converters need to be connected together in parallel. Due to this interconnection among the power converters with a common DC bus, the equivalent impedance of the DC network, i.e., DC network impedance (DCNI) of these parallel converters, may vary and can cause oscillations in the DC link voltage (DCLV). In the literature, impedance models of grid-tied converters (GCs) based on the AC side are well reported without including these variations in DCNI. In addition, the dynamics of a phase-locked loop (PLL) play a significant role in GC system stability. To evaluate these stability issues, this paper proposes small signal impedance models viewing from the DC side of a three-phase GC operating under different control modes considering the PLL dynamics and the DCNI variations. Using the proposed DC impedance models (DCIM), DCLV stability analysis is evaluated for a GC. It is verified through bode plots that the interaction between the proposed DCIM and DCNI leads to unstable operation of the closed-loop converter near the PLL bandwidth when the phase difference between DCIM and DCNI is more than 180 degrees. Finally, the analytically developed models are validated using hardware in-the-loop (HIL) testing.