Power gating in asynchronous micropiplines for low power data driven computing
Power gating in asynchronous micropiplines for low power data driven computing
复制标题
用于低功耗数据驱动计算的异步微管道中的功率门控
作者：
Austin Ogweno;A. Yakovlev;P. Degenaar
在这项工作中，我们探讨在何种程度上在异步微流水线的电源门控是有益的，在不同的输入数据速率在低工作电压。此外，我们提出了一个进一步的改进，以前的技术，通过增加延迟块的电源门控电压域，以减少这些块消耗的泄漏能量。提出了一种具有4相捆绑数据握手协议的异步FIR滤波器，并给出了其关断和不关断两种情况。在90 nm CMOS中实现，并在600 mV下进行模拟，记录不同的输入数据速率和总能耗。值得注意的是，在较低的数据速率下，具有细粒度功率门控的电路设计是节能的，而在较高的数据速率下，它比没有功率门控的电路设计消耗更多的能量。我们的设计在1KHz输入数据速率下实现了43%的总节能，而以前的技术为31%。
In this work we explore the extent at which power gating in asynchronous micropipelines is beneficial at low operating voltages at different input data rates. In addition we present a further improvement to previous techniques by adding the delay blocks to the power gated voltage domains to reduce the leakage energy consumed by these blocks. An asynchronous FIR filter with 4 phase bundled data handshake protocol is presented with and without power shutoff. Implementation is done in 90nm CMOS and simulations performed at 600mV with different input data rates and the total energy consumption recorded. It was noted that at lower data rates, the circuit design with fine grained power gating is energy efficient while at higher data rates it consumes more energy than one without power gating. Our design achieves a total energy saving of 43% at 1KHz input data rate compared to 31% for the previous technique.