Scalable Multilevel Vectorless Power Grid Voltage Integrity Verification
Scalable Multilevel Vectorless Power Grid Voltage Integrity Verification
复制标题
可扩展的多级无矢量电网电压完整性验证
DOI：
10.1109/tvlsi.2012.2212033
复制
发表时间：
2013
影响因子：
2.8
通讯作者：
Zhuo Feng
中科院分区：
文献类型：
--
作者：
Zhuo Feng
随着当前的积极集成电路技术缩放，无矢量电网电压完整性验证成为设计可靠的动力输送网络的关键，以应对现有的无矢量电网验证方法的挑战。 ，在本文中，我们提出了可扩展的多级矢量电网验证方法，该方法可以有效地解决非常大的功率网格通过利用一系列更高的网格验证来验证，可以更有效地实现最优质的电网验证，以获得良好的效率。利用网格结构和电气性能，以促进整个芯片中最坏的情况下的电压下降。验证成本和解决方案质量之间的灵活权衡，同时为最坏情况下的保守上/下限提供了大量的实验结果，发现使用100万个节点的翻转芯片电网设计的最差电压降时间不到两个小时。
With the current aggressive integrated circuit technology scaling, vectorless power grid voltage integrity verification becomes key to designing reliable power delivery networks. To address the challenges of existing vectorless power grid verification methods that suffer from excessively long optimization time and poor scalability to large power grid designs, in this paper, we present a scalable multilevel vectorless power grid verification method which can efficiently tackle very large scale power grid verifications. By taking advantage of a series of coarsest to coarser grid verifications, the finest power grid verification can be accomplished in a more efficient way. To gain good efficiency, global and local “critical regions” for power grid verification are introduced, while power grid structure and electrical properties are exploited to facilitate identifying the worst case voltage drops across the entire chip. The proposed multilevel power grid verification algorithm allows more flexible tradeoffs between verification cost and solution quality, while providing the desired conservative upper/lower bounds for worst case voltage drops. Extensive experimental results show that our approach can efficiently handle very large power grid designs without sacrificing the final power grid verification accuracy. For example, finding the worst voltage drop for a flip-chip power grid design with one million nodes takes less than two hours.