Developing Power Semiconductor Device Model for Virtual Prototyping of Power Electronics Systems
Developing Power Semiconductor Device Model for Virtual Prototyping of Power Electronics Systems
复制标题
开发用于电力电子系统虚拟样机的电力半导体器件模型
DOI：
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发表时间：
2016
期刊：
影响因子：
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通讯作者：
Mark C. Johnson
中科院分区：
文献类型：
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作者：
Ke Li;Paul L. Evans;Mark C. Johnson
虚拟样机技术在电力电子系统设计中具有重要的应用价值。提出了一种基于不同建模技术和模型降阶的虚拟样机设计工具。为了将电路电磁模型与功率半导体器件模型相结合，提出了一种SiC-JFET行为模型，并在设计工具中实现。使用SiC-JFET器件的半桥电路因此在VP软件中表示。通过与实验测量的开关波形对比，验证了所提出的SiC-JFET行为模型。
Virtual prototyping (VP) is very important for power electronics systems design. A virtual prototyping design tool based on different modelling technology and model order reduction is proposed in the paper. In order to combine circuit electromagnetic model with power semiconductor device models, a SiC-JFET behavioural model is presented and implemented in the design tool. A half bridge circuit using SiC-JFET devices is thus represented in the VP software. The presented SiC-JFET behavioural model is then validated by comparing with experimental measurements on switching waveforms.