A case study of Time-Multiplexed Assertion Checking for post-silicon debugging
A case study of Time-Multiplexed Assertion Checking for post-silicon debugging
复制标题
用于硅后调试的时分复用断言检查案例研究
DOI：
10.1109/hldvt.2010.5496657
复制
发表时间：
2010
期刊：
影响因子：
--
通讯作者：
K. Cheng
中科院分区：
文献类型：
--
作者：
Ming Gao;K. Cheng
硅后调试已成为65纳米及以下现代设计流程中最不可预测和最劳动密集型的步骤。在本文中，我们提出了一种设计调试（DfD）技术-时间复用断言检查（TMAC）-后硅缺陷检测和隔离。通过以时分复用方式在片上可重配置块（嵌入式FPGA块或备用可编程核）中实例化断言检查器，TMAC使得能够以微不足道的面积开销在片上硬件实现大量断言检查器。在一个案例研究的H.264解码器，一个TMAC实现80个时间复用断言检查与ASIC实现专用断言检查和没有比较。实验结果表明，在那些注入的错误，不能检测到一个全面的测试台的解码器，这80个硬件断言检查器可以成功地检测到39.4%的这些难以检测的错误。使用TMAC，面积开销仅为1.3%。此外，TMAC显著减少了识别这些检测到的错误的根本原因的时间和精力。案例研究表明，平均而言，TMAC检查器减少了87倍的错误检测延迟，第一个断言违反的位置可以帮助快速定位错误的设计模块。
Post-silicon debugging has become the least predictable and most labor-intensive step in the modern design flow at 65nm and below. In this paper, we present a design-for-debug (DfD) technique - named Time-Multiplexed Assertion Checking (TMAC) - for post-silicon bug detection and isolation. By instantiating assertion checkers in an on-chip reconfigurable block (either an embedded FPGA block or a spare programmable core) in a time-multiplexed fashion, TMAC enables hardware implementation of a large number of assertion checkers on-chip with a trivial area overhead. In a case study of an H.264 decoder, a TMAC implementation with eighty time-multiplexed assertion checkers are compared with an ASIC implementation with and without dedicated assertion checkers. Experimental results demonstrate that, among those injected bugs that cannot be detected by a comprehensive set of testbenches for the decoder, those eighty hardware assertion checkers can successfully detect 39.4% of these hard-to-detect bugs. With TMAC, the area overhead is only 1.3%. Moreover, TMAC significantly reduces the time and effort for identifying the root causes of these detected bugs. The case study shows that, on average, the TMAC checkers reduces the bug detection latency by 87 times, and the location of the first assertion violation can help quickly localize the faulty design module.