Programmatic Control of a Compiler for Generating High-performance Spatial Hardware
Programmatic Control of a Compiler for Generating High-performance Spatial Hardware
复制标题
生成高性能空间硬件的编译器的程序控制
DOI：
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发表时间：
2017
期刊：
影响因子：
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通讯作者：
Hongbo Rong
中科院分区：
文献类型：
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作者：
Hongbo Rong
这篇方法论论文讨论了空间架构上的高性能高生产力编程。空间架构对于执行并行算法是有效的，但是对于高性能编程，生产率低并且验证是痛苦的。我们表明，编码和验证是空间架构广泛采用的最大障碍。我们提出了一种新的编程方法，T2S（时间到空间），以消除这一障碍。程序员指定时间定义和空间映射。时间定义定义了要计算的功能，而空间映射定义了如何分解功能并将分解的部分映射到空间架构上。规范精确地控制编译器实际实现映射中指定的循环和数据转换。该规范是面向循环嵌套和矩阵的，因此适合于编译器进行自动静态验证。许多通用的，战略循环和数据优化可以系统地表达。因此，高性能与高生产力的预期：与高性能编程在今天的高级综合（HLS）语言或硬件描述语言（HDL），工程工作的编码和验证预计将减少从几个月到几个小时，减少2或3个数量级。
This methodology paper addresses high-performance high-productivity programming on spatial architectures. Spatial architectures are efficient for executing dataflow algorithms, yet for high-performance programming, the productivity is low and verification is painful. We show that coding and verification are the biggest obstacle to the wide adoption of spatial architectures. We propose a new programming methodology, T2S (Temporal to Spatial), to remove this obstacle. A programmer specifies a temporal definition and a spatial mapping. The temporal definition defines the functionality to compute, while the spatial mapping defines how to decompose the functionality and map the decomposed pieces onto a spatial architecture. The specification precisely controls a compiler to actually implement the loop and data transformations specified in the mapping. The specification is loop-nest- and matrix-oriented, and thus lends itself to the compiler for automatic, static verification. Many generic, strategic loop and data optimizations can be systematically expressed. Consequently, high performance is expected with substantially higher productivity: compared with high-performance programming in today's high-level synthesis (HLS) languages or hardware description languages (HDLs), the engineering effort on coding and verification is expected to be reduced from months to hours, a reduction of 2 or 3 orders of magnitude.