Heterogeneous Integration of Atomically Thin Semiconductors for Non‐von Neumann CMOS
Heterogeneous Integration of Atomically Thin Semiconductors for Non‐von Neumann CMOS
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用于非冯诺依曼 CMOS 的原子薄半导体的异质集成
DOI：
10.1002/smll.202202590
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发表时间：
2022
期刊：
影响因子：
13.3
通讯作者：
Das, Saptarshi
中科院分区：
文献类型：
--
作者：
Pendurthi, Rahul;Jayachandran, Darsith;Kozhakhmetov, Azimkhan;Trainor, Nicholas;Robinson, Joshua A.;Redwing, Joan M.;Das, Saptarshi
原子薄，二维，半导体过渡金属二硫属化物（TMD）被视为互补金属氧化物半导体（CMOS）技术在未来节点的潜在候选人。虽然高性能场效应晶体管（FET）、逻辑门和集成电路（IC）已被证明是由在晶圆级生长的n型TMD（如MoS2和WS2）制成的，但实现CMOS电子器件需要集成大面积p型半导体。此外，存储器和逻辑的物理分离是现有CMOS技术的瓶颈，并且必须被克服以减少用于计算的能量负担。在这篇文章中，现有的限制被克服，并首次介绍了大面积生长的n型MoS2和p型钒掺杂WSe2FET的非易失性和模拟存储器存储能力的异质集成，以实现非冯诺依曼2D CMOS平台。这种制造工艺流程允许精确定位n型和p型FET，这对任何IC开发都至关重要。还演示了使用该非冯诺依曼2D CMOS平台的反相器和简化的2输入1输出多路复用器以及高斯、S形和双曲正切激活函数等神经形态计算原语。该演示展示了晶圆级2D材料的异质集成的可行性。
Atomically thin, 2D, and semiconducting transition metal dichalcogenides (TMDs) are seen as potential candidates for complementary metal oxide semiconductor (CMOS) technology in future nodes. While high‐performance field effect transistors (FETs), logic gates, and integrated circuits (ICs) made from n‐type TMDs such as MoS2and WS2grown at wafer scale have been demonstrated, realizing CMOS electronics necessitates integration of large area p‐type semiconductors. Furthermore, the physical separation of memory and logic is a bottleneck of the existing CMOS technology and must be overcome to reduce the energy burden for computation. In this article, the existing limitations are overcome and for the first time, a heterogeneous integration of large area grown n‐type MoS2and p‐type vanadium doped WSe2FETs with non‐volatile and analog memory storage capabilities to achieve a non–von Neumann 2D CMOS platform is introduced. This manufacturing process flow allows for precise positioning of n‐type and p‐type FETs, which is critical for any IC development. Inverters and a simplified 2‐input‐1‐output multiplexers and neuromorphic computing primitives such as Gaussian, sigmoid, and tanh activation functions using this non–von Neumann 2D CMOS platform are also demonstrated. This demonstration shows the feasibility of heterogeneous integration of wafer scale 2D materials.