A 1.5V 20/30 Gb/s CMOS backplane driver with digital pre-emphasis
A 1.5V 20/30 Gb/s CMOS backplane driver with digital pre-emphasis
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具有数字预加重功能的 1.5V 20/30 Gb/s CMOS 背板驱动器
DOI：
10.1109/cicc.2004.1358724
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发表时间：
2004
影响因子：
2.9
通讯作者：
S. Voinigescu
中科院分区：
文献类型：
--
作者：
P. Westergaard;T. Dickson;S. Voinigescu
介绍了一种适用于20 Gb/s背板芯片间串行通信的高速输入比较器和输出驱动器。该电路采用130 nm CMOS实现，1.5 V电源供电时功耗为140 mW。它具有超过30 dB的动态范围，灵敏度为20 mVp-p，在20 Gb/s时差分输出摆幅为700 mVp-p。该输出驱动器采用了一种新颖的数字预加重电路，具有独立的脉冲高度和宽度控制。其他功能包括30%-70%的眼交叉控制和可调输出摆幅，每侧在170 mVp-p和350 mVp-p之间，数据速率高达30 Gb/s。
A high-speed input comparator and output driver with adjustable pre-emphasis for applications in serial interchip communications over backplanes at 20 Gb/s is presented. The circuit was implemented in 130-nm CMOS and consumes 140 mW from a 1.5-V supply. It has over 30 dB dynamic range with a sensitivity of 20 mVp-p and a differential output swing of 700 mVp-p at 20 Gb/s. The output driver features a novel digital pre-emphasis circuit with independent pulse height and width control. Other features include 30%-70% eye-crossing control and adjustable output swing between 170 mVp-p and 350 mVp-p per side at data rates up to 30 Gb/s.