Targeting the Parallella
Targeting the Parallella
复制标题
瞄准平行线
DOI：
--
复制
发表时间：
2015
期刊：
影响因子：
--
通讯作者：
V. Dimakopoulos
中科院分区：
文献类型：
--
作者：
S. Agathos;Alexandros Papadogiannakis;V. Dimakopoulos
异构计算涉及具有不同架构的处理元件的组合使用，并且被广泛认为是寻求更高性能和更低功耗的先决条件。为了支持这一趋势，OpenMP标准最近增加了针对由通用主机和加速器设备组成的系统的指令，这些系统可以执行统一应用程序代码的一部分。在这项工作中，我们提出了第一个实施的OpenMP 4.0加速器指令的Xuelella板，一个非常流行的信用卡大小的多核系统组成的双核ARM主机处理器和一个独特的16核主显节协处理器。我们详细讨论了必要的编译器和运行时的基础设施，我们的原型，无论是主机和协处理器方面。
Heterogeneous computing involves the combined use of processing elements with different architectures and is widely considered a prerequisite in the quest for higher performance and lower power consumption. To support this trend, the OpenMP standard has been recently augmented with directives that target systems consisting of general-purpose hosts and accelerator devices that may execute portion of a unified application code. In this work we present the first implementation of the OpenMP 4.0 accelerator directives for the Parallella board, a very popular credit-card sized multicore system consisting of a dual-core ARM host processor and a distinct 16-core Epiphany co-processor. We discuss in detail the necessary compiler and runtime infrastructures of our prototype, both for the host and the co-processor sides.