Charge Pump Phase-Locked Loops and Full Wave Rectifiers for Reachability Analysis
Charge Pump Phase-Locked Loops and Full Wave Rectifiers for Reachability Analysis
复制标题
用于可达性分析的电荷泵锁相环和全波整流器
DOI:
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发表时间:
2017
期刊:
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通讯作者:
Taylor T. Johnson
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文献类型:
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作者:
O. Beg;A. Davoudi;Taylor T. Johnson
Analog-mixed signal (AMS) circuits are widely used in various mission-critical applications necessitating their formal verification prior to implementation. We consider modeling two AMS circuits as hybrid automata, particularly a charge pump phase-locked loop (CP-PLL) and a full-wave rectifier (FWR). We present executable models for the benchmarks in SpaceEx format, perform reachability analysis, and demonstrate their automatic conversion to MathWorks Simulink/Stateflow (SLSF) format using the HyST tool. Moreover, as a next step towards implementation, we present the VHDL-AMS description of a circuit based on the verified model. Category: academic Difficulty: medium 1 Context and Origins Many analog-mixed signal (AMS) circuits are widely used in various mission cicritical applications and require formal verification prior implementation. Formal verification methods construct a mathematical modelM with precise semantics, provide extensive analysis with respect to some correctness requirement P, and verify thatM |= P [2]. This can be ascertained through reachability analysis [1]. As an example of circuitry that can benefit from formal verification prior to field implementation and deployment, we provide two potential benchmarks for hybrid verification research community, i.e., charge pump phase-locked loop (CP-PLL), and full-wave rectifier (FWR). CP-PLL integrated circuits are widely used in modern mobile, radio, and wireless communication applications to synchronize a high-frequency signal with a low-frequency reference signal. In [8], the auhtors use SpaceEx model checking tool [6] to verify the global convergence with respect to phase and frequency lock for a digital PLL. An FWR converts an AC electric input signal to a DC output signal, and formal verification through reachability analysis has been reported using different model checking tools in [5], except SpaceEx. We develop hybrid automaton models of CP-PLL and FWR, and used SpaceEx [6], a reachability analysis tool, to compute the over-approximated sets of reachable states 1. This a classical fixed point computation tool that operates on symbolic states. We also use HyST (Hybrid Source Transformer) [3] to automatically convert the hybrid automaton models developed in SpaceEx to MathWorks Simulink/Stateflow (SLSF) models 2. It is a source-to-source translation tool that takes input in the SpaceEx model format, and translates it to the formats of HyCreate,Flow*, dReach, C2E2, Passel 2.0, and HyComp. Additional tool support is being added from time to time. Verification and validation research community may use HyST to automatically transform the hybrid automaton models in SpaceEx format to 1The tool is available online from the SpaceEx website at: http://spaceex.imag.fr/. 2The executable models are included on the ARCH website and are also available online from the HyST website at: http://verivital.com/hyst/.