Experimental demonstration of SiC screen grid vertical JFET (SiC-SGVJFET) having a ultra-low Crss
Experimental demonstration of SiC screen grid vertical JFET (SiC-SGVJFET) having a ultra-low Crss
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具有超低 Crss 的 SiC 屏栅垂直 JFET (SiC-SGVJFET) 的实验演示
DOI：
10.1109/ispsd.2016.7520884
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发表时间：
2016
期刊：
影响因子：
--
通讯作者：
M. Yamamoto
中科院分区：
文献类型：
--
作者：
K. Yano;T. Ishikawa;Yasunori Tanaka;T. Yatsuo;M. Yamamoto
我们已经实现了一种新型的SiC功率JFET，具有超低的反馈电容Crss和额定电压为1200 V，这被称为屏幕栅极垂直JFET（SGVJFET）。电容-电压测试已经清楚地表明，引入屏栅大大降低了Crss。研究了相邻屏栅间距对开关管静态特性和开关特性的影响。
We have implemented a novel SiC power JFET having a ultra-low feedback capacitance Crss and the voltage rating of 1200V, which is called the screen grid vertical JFET (SGVJFET). Capacitance-voltage tests have made it clear that the introduction of the screen grid drastically reduces the Crss. Impacts of the spacing between the adjacent screen grids on the static and switching characteristics have been investigated.