High performance horizontal gate-all-around silicon nanowire field-effect transistors
High performance horizontal gate-all-around silicon nanowire field-effect transistors
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DOI：
10.1088/0957-4484/23/39/395202
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发表时间：
2012-10
期刊：
影响因子：
3.5
通讯作者：
O. Shirak;O. Shtempluck;V. Kotchtakov;G. Bahir;Y. Yaish
中科院分区：
文献类型：
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作者：
O. Shirak;O. Shtempluck;V. Kotchtakov;G. Bahir;Y. Yaish
半导体纳米线已被指出是亚微米电子应用中最有前途的基石之一。这些纳米材料为后平面传统金属氧化物半导体器件领域开辟了新的机遇。在此，我们展示了一种用栅极全能场效应晶体管制作水平悬浮硅纳米线的新技术。我们提出了一种高性能晶体管的设计、制造和电学测量，该晶体管具有高电流密度（~ 150 μA μm−1）、高开/关电流比（106）、低阈值电压（~−0.4 V）、低亚阈值斜率（~ 100 mV /dec）和高跨导（gm ~ 9.5 μS）。由于周围栅极的紧密静电耦合，这些高性能特性成为可能，这大大降低了肖特基势垒的有效高度，正如本研究中实验证实的那样。
Semiconducting nanowires have been pointed out as one of the most promising building blocks for submicron electrical applications. These nanometer materials open new opportunities in the area of post-planar traditional metal–oxide–semiconductor devices. Herein, we demonstrate a new technique to fabricate horizontally suspended silicon nanowires with gate-all-around field-effect transistors. We present the design, fabrication and electrical measurements of a high performance transistor with high on current density (∼150 μA μm−1), high on/off current ratio (106), low threshold voltage (∼ − 0.4 V), low subthreshold slope (∼100 mV /dec) and high transconductance (gm ∼ 9.5 μS). These high performance characteristics were possible due to the tight electrostatic coupling of the surrounding gate, which significantly reduced the Schottky-barrier effective height, as was confirmed experimentally in this study.