Heterogeneous floorplanning for FPGAs
Heterogeneous floorplanning for FPGAs
复制标题
FPGA 的异构布局规划
DOI：
10.1109/vlsid.2006.96
复制
发表时间：
2006
期刊：
影响因子：
--
通讯作者：
D. Mehta
中科院分区：
文献类型：
--
作者：
Yan Feng;D. Mehta
The large size of modern FPGAs has caused researchers to consider deploying hierarchical techniques in their design. In this paper, we consider the floorplanning of FPGAs. We present a two-step approach for the floorplanning of modern FPGAs that we believe is cleaner and more versatile than recent floorplanners. The steps, based on resource-aware fixed outline simulated annealing and constrained floorplanning, are adapted to address the heterogeneous nature of FPGA floorplanning. Experiments demonstrate the viability of our approach.
