Exploiting Intel TSX for fault-tolerant execution in safety-critical systems
Exploiting Intel TSX for fault-tolerant execution in safety-critical systems
复制标题
利用 Intel TSX 在安全关键系统中实现容错执行
DOI：
10.1109/dft.2014.6962083
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发表时间：
2014
期刊：
影响因子：
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通讯作者：
T. Ungerer
中科院分区：
文献类型：
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作者：
Florian Haas;Sebastian Weis;Stefan Metzlaff;T. Ungerer
安全关键系统需要不断增加的计算能力，这就需要高性能的嵌入式系统。虽然商用 (COTS) 处理器以较低的价格提供较高的计算性能，但它们不提供对容错执行的硬件支持。然而，纯基于软件的容错方法需要较高的设计复杂性和运行时开销。在本文中，我们为 COTS ×86 处理器提出了一种基于软件/硬件的高效冗余执行方案，该方案利用了英特尔 Haswell 微架构引入的事务同步扩展 (TSX)。我们的方法扩展了静态二进制检测工具，以在函数粒度上插入容错事务和故障检测指令。 TSX 硬件支持用于错误遏制和恢复。与非容错执行相比，选定 SPEC2006 基准测试的平均运行时开销仅为 49%。
Safety-critical systems demand increasing computational power, which requests high-performance embedded systems. While commercial-of-the-shelf (COTS) processors offer high computational performance for a low price, they do not provide hardware support for fault-tolerant execution. However, pure software-based fault-tolerance methods entail high design complexity and runtime overhead. In this paper, we present an efficient software/hardware-based redundant execution scheme for a COTS ×86 processor, which exploits the Transactional Synchronization Extensions (TSX) introduced with the Intel Haswell microarchitecture. Our approach extends a static binary instrumentation tool to insert fault-tolerant transactions and fault-detection instructions at function granularity. TSX hardware support is used for error containment and recovery. The average runtime overhead for selected SPEC2006 benchmarks was only 49% compared to a non-fault-tolerant execution.