Multi-Mode Spatial Signal Processor With Rainbow-Like Fast Beam Training and Wideband Communications Using True-Time-Delay Arrays
Multi-Mode Spatial Signal Processor With Rainbow-Like Fast Beam Training and Wideband Communications Using True-Time-Delay Arrays
复制标题
彩虹型快波束训练多模空间信号处理器及使用真时延阵列的宽带通信
DOI：
10.1109/jssc.2022.3178798
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发表时间：
2022-06-08
影响因子：
5.4
通讯作者：
Gupta, Subhanshu
中科院分区：
文献类型：
--
作者：
Lin, Chung-Ching;Puglisi, Chase;Gupta, Subhanshu
毫米波 (mmW) 无线的初始接入对于成功实现第五代 (5G) 及更高版本的无线网络至关重要。现有标准中的有限带宽以及模拟/混合相控天线阵列 (PAA) 中移相器的使用不适合这些要求低延迟测向的新兴标准。这项工作提出了一种基于可重构实时延迟（TTD）的空间信号处理器（SSP），具有频分波束训练方法和宽带波束斜视少数据通信。离散时间延迟补偿时钟技术用于通过基于大单位增益带宽环形放大器 (RAMP) 的信号组合器支持 800 MHz 带宽。为了在不同的 SSP 模式和频率角度对上广泛表征所提出的 SSP，使用计算机视觉技术开发了一个自动化测试台，该技术可显着加快测试进度并最大限度地减少可能的人为错误。 TTD SSP 对四个天线元件中的每一个都使用七级时间交织，在 800 MHz 上的延迟范围为 3.8 ns，并在波束训练模式下实现独特的频率到角度映射，在波束成形模式下实现近 12 dB 频率无关增益。 SSP 采用 65 nm CMOS 进行原型设计，面积为 1.98 mm(2)，不包括缓冲器，功耗仅为 29 mW。此外，16-QAM 调制在 614.4 Mb/s 的速度下实现了 7.3% 的误差矢量幅度 (EVM)。
Initial access in millimeter-wave (mmW) wireless is critical toward successful realization of the fifth-generation (5G) wireless networks and beyond. Limited bandwidth in existing standards and use of phase-shifters in analog/hybrid phased-antenna arrays (PAAs) are not suited for these emerging standards demanding low-latency direction finding. This work proposes a reconfigurable true-time-delay (TTD)-based spatial signal processor (SSP) with frequency-division beam training methodology and wideband beam-squint less data communications. Discrete-time delay compensated clocking technique is used to support 800-MHz bandwidth with a large unity-gain bandwidth ring-amplifier (RAMP)-based signal combiner. To extensively characterize the proposed SSP across different SSP modes and frequency-angle pairs, an automated testbed is developed using computer vision techniques that significantly speeds up the testing progress and minimizes possible human errors. Using seven levels of time-interleaving for each of the four antenna elements, TTD SSP has a delay range of 3.8 ns over 800 MHz and achieves unique frequency-to-angle mapping in the beam training mode with nearly 12-dB frequency-independent gain in the beamforming mode. The SSP is prototyped in 65-nm CMOS with an area of 1.98 mm(2) consuming only 29 mW excluding buffers. Furthermore, an error vector magnitude (EVM) of 7.3% is realized for 16-QAM modulation at a speed of 614.4 Mb/s.