Low-Power Heterogeneous Platform for High Performance Computing and Its Application to 2-D FDTD Computation
Low-Power Heterogeneous Platform for High Performance Computing and Its Application to 2-D FDTD Computation
复制标题
DOI：
--
复制
发表时间：
2012-09
期刊：
影响因子：
--
通讯作者：
Hariyama Masanori;Hasitha Muthumala Waidyasooriya;Take Yasuhiro;K. Michitaka
中科院分区：
文献类型：
--
作者：
Hariyama Masanori;Hasitha Muthumala Waidyasooriya;Take Yasuhiro;K. Michitaka
基于CPU和低功耗加速器的异构处理技术由于能够实现高能效计算而受到广泛关注。然而，在高性能计算中使用低功耗加速器（如FPGA）来降低功耗的潜力很少被利用。本文提出了一种CPU/FPGA异构平台来实现时域有限差分（FDTD）计算。根据实验结果，我们发现，95%的计算可以在FPGA中完成使用32位定点算法，而不会遭受重大的精度损失。根据我们的估计，我们可以实现相同的CPU/GPU计算性能，10倍的功耗，通过使用所提出的低功耗异构平台。
Heterogeneous processing with CPUs and lowpower accelerators attract many attentions since they can achieve power-efficient computing. However, the potential of using low-power accelerators such as FPGAs in highperformance computing to reduce the power consumption is rarely exploited. In this paper, we propose a CPU/FPGA heterogeneous platform to implement the finite-difference timedomain (FDTD) computation. According to the experimental results, we found that 95% of the computation can be done in FPGA using 32bit fixed point arithmetic without suffering a major precision loss. According to our estimation, we can achieve the same performance of CPU/GPU computing with 10 times less power consumption by using the proposed lowpower heterogeneous platform.