Demonstration of a single-flux-quantum microprocessor using passive transmission lines
Demonstration of a single-flux-quantum microprocessor using passive transmission lines
复制标题
使用无源传输线演示单通量量子微处理器
DOI：
10.1109/tasc.2005.849860
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发表时间：
2005
影响因子：
1.8
通讯作者：
S. Yorozu
中科院分区：
文献类型：
--
作者：
Masamitsu Tanaka;T. Kondo;N. Nakajima;T. Kawamoto;Y. Yamanashi;Y. Kamiya;A. Akimoto;A. Fujimaki;H. Hayakawa;N. Yoshikawa;H. Terai;Y. Hashimoto;S. Yorozu
我们成功演示了一款使用基于单通量量子LSI技术的无源传输线的8位微处理器。在这里设计的微处理器，称为CORE 1/spl alpha/6，一个简单的位串行结构与七条指令。在CORE 1/spl alpha/6中，平面图的设计考虑到了存储器的集成，并使用了无源传输线（PTL）来连接电路块。PTL的使用帮助我们减少了长互连中的传播延迟。该设计增强了平面布局的设计灵活性，微处理器的性能比我们以前的设计提高了20%。CORE 1/spl alpha/6由6319个约瑟夫森结和15个PTL组成，功耗为2.1 mW。我们已经确认了完整的操作的核心1/spl阿尔法/6片上高速测试。已发现位操作和指令执行的最大时钟频率分别为18 GHz和1.2 GHz，其中性能对应于每秒2.4亿条指令（MIPS）。
We have successfully demonstrated an 8-bit microprocessor using passive transmission lines based on single-flux-quantum LSI technology. In the microprocessor designed here, called CORE1/spl alpha/6, a simple bit-serial architecture with seven instructions was employed. In the CORE1/spl alpha/6, the floor plan was designed with consideration toward integration of a memory, and superconductive passive transmission lines (PTLs) were used to connect circuit blocks. Utilization of PTLs helped us reduce the propagation delay in long interconnections. The design flexibility of the floor plan was enhanced and the performance of the microprocessor was improved by 20% compared with our previous design. The CORE1/spl alpha/6 was composed of 6319 Josephson junctions and 15 PTLs with power consumption of 2.1 mW. We have confirmed the complete operations of the CORE1/spl alpha/6 by on-chip high-speed tests. The maximum clock frequencies for bit operation and instruction execution have been found to be 18 GHz and 1.2 GHz, respectively, where the performance corresponds to 240 million instructions per second (MIPS).