Benchmarks for layout synthesis - evolution and current status

Benchmarks for layout synthesis - evolution and current status
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布局综合的基准 - 演变和现状

DOI:
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发表时间:
1991
期刊:
28th ACM/IEEE Design Automation Conference
影响因子:
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通讯作者:
K. Kozminski
K. Kozminski
中科院分区:
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文献类型:
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作者:
K. Kozminski

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本文介绍了由微电子中心维护和分发的版图综合基准的过去和正在进行的工作。在五年的时间里开发的基准测试套件包含了代表各种版图设计问题的示例,并已被世界各地的研究人员广泛用于评估版图合成算法的性能。与版图综合相关的基准测试工作的目标在MNC进行的其他基准测试活动的背景下进行了讨论,在文章的结论中,提出了未来统一IC设计系统基准测试的方向。
This paper presents past and ongoing work on layout synthesis benchmarks maintained and distributed by the MCNC Center for Microelectronics. The benchmark suite developed over the course of five years contains examples representing a variety of layout design problems and has been quite extensively used by researchers around the world to evaluate the performance of layout synthesis algorithms. The goals of the benchmarking efforts as related to layout synthesis are discussed in the context of other benchmark activities conducted at MCNC, In the conclusion of the paper, future directions are proposed to unify the benchmarking of IC design systems.