Large-scale graphene transistors with enhanced performance and reliability based on interface engineering by phenylsilane self-assembled monolayers.
Large-scale graphene transistors with enhanced performance and reliability based on interface engineering by phenylsilane self-assembled monolayers.
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DOI：
10.1021/nl1033842
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发表时间：
2011-02
期刊：
影响因子：
10.8
通讯作者：
Zihong Liu;A. Bol;W. Haensch
中科院分区：
文献类型：
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作者：
Zihong Liu;A. Bol;W. Haensch
在这封信中，我们报告的电介质/石墨烯界面物理和工程的大规模，化学气相沉积（CVD）石墨烯晶体管通过自组装分子尺度的有机硅烷单层到电介质表面。我们表明，在电介质/石墨烯界面处的苯基-烷基封端的自组装单层（SAM）一致地提高了石墨烯器件的性能和可靠性。在苯基-SAM工程化电介质上的大规模CVD石墨烯晶体管的非本征场效应迁移率目前在室温下高达2500 cm（2）/（V s），显著高于没有SAM的对应物。此外，基于SAM的界面工程实现了偏置应力不稳定性和滞后的显著降低。进一步的分析表明，从石墨烯到电介质/石墨烯界面的电荷注入主导了所观察到的滞后行为。对于具有和不具有自组装膜的石墨烯晶体管，偏置应力稳定性，即偏置应力下的狄拉克点位移，由拉伸指数模型很好地描述，其拟合参数清楚地指示不同的界面性质。
In this letter, we report the dielectric/graphene interface physics and engineering of large-scale, chemical vapor deposited (CVD) graphene transistors by self-assembling a molecular-scale organosilane monolayer onto the dielectric surface. We show that phenyl-alkyl-terminated self-assembled monolayers (SAM) at the dielectric/graphene interface consistently improve the graphene device performance and reliability. The extrinsic field-effect mobility of large-scale CVD graphene transistors on the phenyl-SAM engineered dielectric is currently up to 2500 cm(2)/(V s) at room temperature, considerably higher than the counterparts without the SAM. In addition, significant reduction on the bias stress instability and hysteresis is achieved by the SAM-based interface engineering. Further analysis reveals that charge injection from graphene to the dielectric/graphene interface dominates the observed hysteresis behavior. For both graphene transistors with and without SAMs, the bias stress stability, that is, Dirac point shift under bias stress, is well described by the stretched exponential model with its fitting parameters clearly indicating different interface properties.