VRCon: Dynamic reconfiguration of voltage regulators in a multicore platform
VRCon: Dynamic reconfiguration of voltage regulators in a multicore platform
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VRCon：多核平台中稳压器的动态重新配置
DOI：
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发表时间：
2014
期刊：
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通讯作者：
Massoud Pedram
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文献类型：
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作者：
Woojoo Lee;Yanzhi Wang;Massoud Pedram
利用支持动态电压和频率缩放（DVFS）的芯片多核处理器（CMP）的新兴趋势是由用户对高性能和低功耗的需求驱动的。为了克服传统芯片级DVFS的局限性并实现最大可能的节能，最近的CMP产品正在启用每核DVFS。虽然CMP消耗的功率通过每核DVFS降低，但是支持每核DVFS所需的许多电压调节器（VR）消耗的功率变得至关重要。本文主要研究CMP平台中VR的动态控制。从具有可配置的VR到核心配电网络的拟议平台开始，提出了两种优化方法，以最大限度地提高系统范围的节能效果：（i）反应性VR整合，以重新配置网络，用于最大化在针对核的预定DVFS水平下执行的VR的功率转换效率，以及（ii）主动VR整合，以确定新的DVFS水平，从而在不降低性能的情况下最大限度地节省总能量。详细的实验结果表明，VR能量损失减少了35%，总能源节省了14%。
The emerging trend toward utilizing chip multi-core processors (CMPs) that support dynamic voltage and frequency scaling (DVFS) is driven by user requirements for high performance and low power. To overcome limitations of the conventional chip-wide DVFS and achieve the maximum possible energy saving, per-core DVFS is being enabled in the recent CMP offerings. While power consumed by the CMP is reduced by per-core DVFS, power dissipated by many voltage regulators (VRs) needed to support per-core DVFS becomes critical. This paper focuses on the dynamic control of the VRs in a CMP platform. Starting with a proposed platform with a configurable VR-to-core power distribution network, two optimization methods are presented to maximize the system-wide energy savings: (i) reactive VR consolidation to reconfigure the network for maximizing the power conversion efficiency of the VRs performed under the pre-determined DVFS levels for the cores, and (ii) proactive VR consolidation to determine new DVFS levels for maximizing the total energy savings without any performance degradation. Results from detailed experiments demonstrate up to 35% VR energy loss reduction and 14% total energy saving.