A wideband common‐gate CMOS LNA employing complementary MGTR technique

A wideband common‐gate CMOS LNA employing complementary MGTR technique
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DOI:
10.1002/mop.30601
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发表时间:
2017-07
影响因子:
1.5
通讯作者:
Benqing Guo;Jun Chen
Benqing Guo;Jun Chen
中科院分区:
工程技术4区
文献类型:
--
作者:
Benqing Guo;Jun Chen

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提出了一种具有高增益、低噪声和增强线性度的宽带电容交叉耦合共栅低噪声放大器(CGLNA)。互补多栅晶体管 (CMGTR) 技术增强了线性度。调节辅助晶体管的体电压和缩放尺寸以改变失真系数,补偿主晶体管的非线性。此外,堆叠式PMOS/NMOS配置的电流复用在保证输入匹配的同时降低了功耗。原型采用 0.18 μm RF CMOS 工艺实现。测量结果显示,在 0.2–1.6 GHz 的 3 dB 带宽上,最大电压增益为 19.5 dB,平均噪声系数 (NF) 为 2.1 dB,输入参考三阶交调点 (IIP3) 为 8.3–10 dBm。它在 2.2 V 电源下仅消耗 3.5 mA 电流。
A wideband capacitor cross‐coupled common‐gate low‐noise amplifier (CGLNA) featured with high gain, low noise, and enhanced linearity is proposed. The linearity is enhanced by complementary multi‐gated transistor (CMGTR) technique. The bulk voltage and scaling size of auxiliary transistors are tuned to shift the distortion coefficients, compensating the nonlinearity of main transistors. In addition, the current reuse by stacked PMOS/NMOS configuration reduces power consumption while guaranteeing the input matching. A prototype is implemented in a 0.18 μm RF CMOS process. The measurement shows a maximal voltage gain of 19.5 dB, an average noise figure (NF) of 2.1 dB, and an input‐referred third‐order intercept point (IIP3) of 8.3–10 dBm over a 3 dB bandwidth of 0.2–1.6 GHz, respectively. It consumes only 3.5 mA from a 2.2 V supply.