RIFFA 2.1

RIFFA 2.1
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里法2.1

DOI:
10.1145/2815631
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发表时间:
2015
期刊:
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
影响因子:
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通讯作者:
R. Kastner
R. Kastner
中科院分区:
--
文献类型:
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作者:
Matthew Jacobsen;Dustin Richmond;Matthew Hogains;R. Kastner

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我们提出了Riffa 2.1,这是一个可重复使用的集成框架,用于现场编程的门数组(FPGA)加速器。作为开放源代码,通过将在商品CPU上运行的软件与FPGA内核相结合。操作系统,并允许多个FPGA连接到单个主机PC系统。带宽。
We present RIFFA 2.1, a reusable integration framework for Field-Programmable Gate Array (FPGA) accelerators. RIFFA provides communication and synchronization for FPGA accelerated applications using simple interfaces for hardware and software. Our goal is to expand the use of FPGAs as an acceleration platform by releasing, as open source, a framework that easily integrates software running on commodity CPUs with FPGA cores. RIFFA uses PCI Express (PCIe) links to connect FPGAs to a CPU’s system bus. RIFFA 2.1 supports FPGAs from Xilinx and Altera, Linux and Windows operating systems, and allows multiple FPGAs to connect to a single host PC system. It has software bindings for C/C++, Java, Python, and Matlab. Tests show that data transfers between hardware and software can reach 97% of the achievable PCIe link bandwidth.