Design and Testing of a Modular Multilevel Converter Submodule Based on 10 kV SiC MOSFETs

Design and Testing of a Modular Multilevel Converter Submodule Based on 10 kV SiC MOSFETs
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基于 10 kV SiC MOSFET 的模块化多电平转换器子模块的设计和测试

DOI:
10.1109/ecce.2019.8913193
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发表时间:
2019
期刊:
2019 IEEE Energy Conversion Congress and Exposition (ECCE)
影响因子:
--
通讯作者:
William Giewont
William Giewont
中科院分区:
--
文献类型:
--
作者:
Xingxuan Huang;J. Palmer;Shiqi Ji;Li Zhang;Fred Wang;L. Tolbert;William Giewont

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介绍了一种用于模块化多电平变换器(MMC)的基于分立式10 kV/20 A SiC MOSFET的半桥子模块的设计与测试。子模块的额定直流母线电压为6.5 kV,MOSFET开关dv/dt高达100 V/ns。介绍了子模块中的组件的设计考虑和挑战,特别是支持稳定连续操作的栅极驱动器和子模块电压传感器。系统测试程序的开发,以充分测试子模块高达6.5千伏。高压绝缘和高dv/dt在整个设计和测试过程中得到解决。设计的子模块在6.5 kV的连续开关测试中得到验证,dv/dt高达100 V/ns。
This paper focuses on the design and testing of a half bridge submodule based on discrete 10 kV/20 A SiC MOSFETs for a modular multilevel converter (MMC). The rated dc bus voltage of the submodule is 6.5 kV, and the MOSFETs switch with dv/dt up to 100 V/ns. Design considerations and challenges for components in the submodule are presented, especially the gate driver to support the robust continuous operation and the submodule voltage sensor. Systematic testing procedures are developed to fully test the submodule up to 6.5 kV. High voltage insulation and high dv/dt are tackled throughout the design and testing. The designed submodule is validated in the continuous switching test at 6.5 kV with dv/dt up to 100 V/ns.
DOI: 10.1109/tpel.2010.2042303
发表时间: 2010-02
影响因子: 6.7
作者:
M. Hagiwara;K. Nishimura;H. Akagi
通讯作者: M. Hagiwara;K. Nishimura;H. Akagi