Novel Intrinsic Physical Unclonable Function Design for Post-quantum Cryptography
Novel Intrinsic Physical Unclonable Function Design for Post-quantum Cryptography
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DOI：
10.1109/iscas46773.2023.10182054
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发表时间：
2023-05
期刊：
影响因子：
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通讯作者：
Baosheng Wang;Yijun Cui;Chongyan Gu;Chenghua Wang;Weiqiang Liu
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文献类型：
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作者：
Baosheng Wang;Yijun Cui;Chongyan Gu;Chenghua Wang;Weiqiang Liu
后量子加密（PQC）算法的硬件实现容易受到故障注入攻击。作为一种硬件安全原语，内在物理不可克隆函数（intrinsic physical unclable function， PUF）是一种低资源开销的攻击对策。本文提出了一种新的内禀PUF，即频率可调软件PUF (FAS-PUF)，为PQC芯片提供了一种器件识别方法。FAS-PUF基于PQC芯片的带误差环学习（R-LWE）解密电路中固有的时序逻辑。fasu - puf使用解密电路的$256^{\ast}13^{\ast} 3$-bit的输入密文作为挑战，并使用256-bit的解密输出作为具有可调超频的响应。由于FAS-PUF的熵利用了由超频引起的明显的时序误差，因此不需要修改现有的硬件电路，即保留原有的电路功能，从而大大降低了硬件资源消耗和功耗开销。同时，为了减轻电路亚稳态对超频下PUF稳定性的影响，采用动态时钟选频方法确定产生PUF响应的最佳频率点。提出的FAS-PUF也是一个强大的PUF设计，提供了大量的挑战/响应对（CRPs）。该设计在Xilinx Basys3 fpga上实现。实验结果表明，与其他固有puf相比，FAS-PUF具有良好的唯一性、均匀性和稳定性。
The hardware implementations of post-quantum cryptography (PQC) algorithms are vulnerable to fault injection attacks. As a hardware security primitive, the intrinsic physical unclonable function (PUF) is a possible countermeasure for these attacks with low resource overheads. In this work, a novel intrinsic PUF, frequency adjustable software PUF (FAS-PUF), is proposed to provide a device identification for PQC chips. The FAS-PUF is based on an inherent timing logic in the ring-learning with error (R-LWE) decryption circuit of PQC chips. The FAS-PUF uses a $256^{\ast}13^{\ast} 3$-bit input ciphertext of the decryption circuit as a challenge, and uses a 256-bit decryption output as a response with an adjustable overclocking. Since the entropy of the FAS-PUF utilises the manifested timing errors caused by the overclocking, the FAS-PUF does not need to modify the existing hardware circuits, i.e. preserves the original circuit functions, which significantly reduces hardware resource consumption and power overhead. Meanwhile, to mitigate the affection of circuits' metastablities to PUF's stability under overclocking, a dynamic clock frequency selection method is used to determine the optimal frequency point for generating PUF responses. The proposed FAS-PUF is also a Strong PUF design with a significant number of Challenge/Response Pairs (CRPs) provided. The proposed design is implemented on Xilinx Basys3 FPGAs. The experimental results show that the FAS-PUF has a good uniqueness, uniformity and stability compared with other intrinsic PUFs.